MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 2157

• Manufacturer Part Number: MCIMX281AVM4B
• Description: IC MPU I.MX28 1.2 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX281AVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Supplier Unconfirmed

EXAMPLE
HW_PXP_S0BUF_WR(image_y);
HW_PXP_S0UBUF_WR(image_u);
HW_PXP_S0VBUF_WR(image_v);
Address:
Re-
34.4.8 Source 0 V/Cr Input Buffer Pointer (HW_PXP_S0VBUF)
S0 Chroma (V/Cr) Input Buffer Pointer. This register points to the beginning of the Source
0 V/Cr input buffer. In two plane operation, this register is not used.
This register contains the pointer to the Chroma V/Cr buffer when performing colorspace
conversion. This register is unused when processing RGB data.
EXAMPLE
HW_PXP_S0BUF_WR(image_y);
HW_PXP_S0UBUF_WR(image_u);
HW_PXP_S0VBUF_WR(image_v);
Address:
Re-
Freescale Semiconductor, Inc.
set
set
Bit
Bit
W
W
R
R
31
31
0
0
ADDR
ADDR
Field
31 0
Field
31 0
30
30
0
0
29
29
0
0
HW_PXP_S0UBUF
HW_PXP_S0VBUF
28
28
0
0
Address pointer for the S0 (video) U/Cb or 2 plane UV Chroma input buffer. The address MUST be
word-aligned for proper PXP operation.
Address pointer for the S0 (video) V/Cr Chroma input buffer. The address MUST be word-aligned for proper
PXP operation.
27
27
0
0
26
26
0
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
25
25
0
0
24
24
0
0
23
23
0
0
HW_PXP_S0UBUF field descriptions
HW_PXP_S0VBUF field descriptions
8002_A000h base + 70h offset = 8002_A070h
8002_A000h base + 60h offset = 8002_A060h
// Y (luma) image data
// U (Cb) image data
// V (Cr) image data
// Y (luma) image data
// U (Cb) image data
// V (Cr) image data
22
22
0
0
21
21
0
0
20
20
0
0
19
19
0
0
18
18
0
0
17
17
0
0
ADDR
ADDR
16
16
0
0
15
15
0
0
Description
Description
14
14
0
0
13
13
0
0
12
12
0
0
11
11
0
0
10
10
0
0
0
0
9
9
Chapter 34 Pixel Pipeline (PXP)
0
0
8
8
0
0
7
7
0
0
6
6
0
0
5
5
0
0
4
4
3
0
3
0
0
0
2
2
0
0
1
1
2157
0
0
0
0