MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 974

• Manufacturer Part Number: MCIMX281AVM4B
• Description: IC MPU I.MX28 1.2 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX281AVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Supplier Unconfirmed

SPI Boot Mode
} spi_ConfigBlock_t;
If the block is present, then the boot image is found at the address specified by BootStartAddr.
If the block is not present, then it assumes that the boot image resides on the media starting
at byte address 0.
12.10.3 SSP
The SSP2 and SSP3 ports are used for the SPI boot mode.
The following table is used to look up a requested speed. If the speed is not an exact match,
the boot ROM picks the next lowest value. Speed values can range from 1 to 51.4 MHz. A
speed value of 0 is not allowed.
The table is loaded with the clock rates listed in
974
SCK
INDEX
CLK_SEL
IOFRAC
SSP_FRAC
SSP_CLK
SSP_DIV
SSP_RATE
uint32_t
uint32_t
uint32_t
spi_ConfigBlockFlags_t Flags;
spi_ConfigBlockClocks_t Clocks;
Signature;
BootStartAddr;
SectorSize;
Table 12-27. SCK Clock Standard Values Lookup Table
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
N/A
X
X
X
X
X
0
//
typedef struct _ssp_clockConfig
{
}
ssp_clockConfig_t;
100
.24
24
1
1
X
X
0
Lookup Table entry
int
int
int
int
int
24
24
X
X
1
2
1
0
clkSel
io_frac
ssp_frac
ssp_div
ssp_rate
24
12
X
X
2
3
1
0
24
X
X
4
4
1
6
0
:1; //!< Clock Select (0=io_ref 1=xtal_ref)
24
X
X
6
5
1
4
0
:6; //!< IO FRAC 18-35 (io_frac+16)
:8; //!< Divider: Must be an even value 2-254
// 0x4D454D53, or "SMEM"
// Start address of boot image. Must be >=
//
// Sector size in bytes. Overrides ROM default
//
//
// Various flags. See spi_ConfigBlockFlags
// SCK clock update structure.
:9; //!< SSP FRAC (1=default)
:8; //!< Serial Clock Rate
18
80
10
8
6
0
6
0
sizeof(spi_ConfigBlock_t)
of 128-bytes. Max is 1024-bytes.
default 128-bytes.
Table
10
18
80
7
0
6
8
0
12-27.
12
24
X
X
8
1
2
0
16
18
96
9
0
5
6
0
20
10
18
80
0
6
4
0
Freescale Semiconductor, Inc.
30
11
18
60
0
8
2
0
40
12
18
80
0
6
2
0
48
13
18
96
0
5
2
0
0 is
102.8
51.4
14
21
0
4
2
0
15
X
X
X
X
X
X