MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 2002

• Manufacturer Part Number: MCIMX281AVM4B
• Description: IC MPU I.MX28 1.2 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX281AVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Supplier Unconfirmed

Programmable Registers
2002
WKOC
WKCN
WKDS
PHCD
19 16
PFSC
PTS2
Field
PTC
25
24
23
22
21
20
This bit is not defined in the EHCI specification.
0
1
2
Parallel Transceiver Select,bit2.
See PTS bits for details
Port Force Full Speed Connect.
Default = 0.
Writing this bit to a 1 will force the port to only connect at Full Speed. It disables the chirp sequence that
allows the port to identify itself as high-speed. This is useful for testing full-speed configurations with a
high-speed host, hub or device.
This bit is not defined in the EHCI specification. This bit is for debugging purposes.
PHY Low Power Suspend - Clock Disable (PLPSCD).
Default = 0.
Writing this bit to a 1 will disable the PHY clock.
Writing a 0 enables it. Reading this bit will indicate the status of the PHY clock.
In Device Mode: The PHY can be put into Low Power Suspend running (USBCMD Run/Stop=0) or the host
has signaled suspend (PORTSC SUSPEND=1). Lowpower suspend will be cleared automatically when the
host has signaled resume. Before forcing a resume from the device, the device controller driver must clear
this bit.
In Host Mode: The PHY can be put into Low Power Suspend device has been put into suspend mode or
when no downstream device is connected. Low power suspend is completely under the control of software.
This bit is not defined in the EHCI specification.
Wake on Over-current Enable (WKOC_E).
Default = 0.
Writing this bit to a 1 enables the port to be sensitive to over-current conditions as wake-up events.
This field is 0 if Port Power (PP) is 0.
Wake on Disconnect Enable (WKDSCNNT_E).
Default=0.
Writing this bit to a 1 enables the port to be sensitive to device disconnects as wake-up events.
This field is 0 if Port Power (PP) is 0 or in device mode.
Wake on Connect Enable (WKCNNT_E).
Default=0.
Writing this bit to a 1 enables the port to be sensitive to device connects as wake-up events.
This field is 0 if Port Power (PP) is 0 or in device mode.
Port Test Control.
Default = 0000b.
HW_USBCTRL_PORTSC1 field descriptions (continued)
FULL — Full Speed.
LOW — Low Speed.
HIGH — High Speed.
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
Description
Freescale Semiconductor, Inc.