EP2AGX190FF35C6N Altera, EP2AGX190FF35C6N Datasheet - Page 274

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EP2AGX190FF35C6N

Manufacturer Part Number
EP2AGX190FF35C6N
Description
IC ARRIA II GX 190K 1152FBGA
Manufacturer
Altera
Series
Arria II GXr

Specifications of EP2AGX190FF35C6N

Number Of Logic Elements/cells
181165
Number Of Labs/clbs
7612
Total Ram Bits
9939
Number Of I /o
612
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1152-FBGA
Family Name
Arria® II GX
Number Of Logic Blocks/elements
190300
# I/os (max)
612
Frequency (max)
400MHz
Operating Supply Voltage (typ)
900mV
Logic Cells
190300
Ram Bits
10380902.4
Operating Supply Voltage (min)
0.87V
Operating Supply Voltage (max)
0.93V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
1152
Package Type
FC-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant

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EP2AGX190FF35C6N
Manufacturer:
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8–34
Arria II Device Handbook Volume 1: Device Interfaces and Integration
A corner PLL and a center PLL can drive duplex channels in the same I/O bank, if the
channels driven by each PLL are not interleaved. No separation is necessary between
the group of channels driven by the corner and center left and right PLLs. Refer to
Figure 8–27
Figure 8–28. Invalid Placement of DPA-Disabled Differential I/Os Due to Interleaving of Channels
Driven by the Corner and Center PLLs
and
Figure
8–28.
Chapter 8: High-Speed Differential I/O Interfaces and DPA in Arria II Devices
DPA-disabled
DPA-disabled
DPA-disabled
DPA-disabled
DPA-disabled
DPA-disabled
DPA-disabled
DPA-disabled
Reference CLK
Reference CLK
DPA-disabled
DPA-disabled
Diff I/O
Diff I/O
Diff I/O
Diff I/O
Diff I/O
Diff I/O
Diff I/O
Diff I/O
Diff I/O
Diff I/O
Center
Center
PLL
PLL
Differential Pin Placement Guidelines
December 2010 Altera Corporation

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