EP2AGX190FF35C6N Altera, EP2AGX190FF35C6N Datasheet - Page 530

• Manufacturer Part Number: EP2AGX190FF35C6N
• Description: IC ARRIA II GX 190K 1152FBGA
• Manufacturer: Altera
• Series: Arria II GXr

Specifications of EP2AGX190FF35C6N

• Number Of Logic Elements/cells: 181165
• Number Of Labs/clbs: 7612
• Total Ram Bits: 9939
• Number Of I /o: 612
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 1152-FBGA
• Family Name: Arria® II GX
• Number Of Logic Blocks/elements: 190300
• # I/os (max): 612
• Frequency (max): 400MHz
• Operating Supply Voltage (typ): 900mV
• Logic Cells: 190300
• Ram Bits: 10380902.4
• Operating Supply Voltage (min): 0.87V
• Operating Supply Voltage (max): 0.93V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 1152
• Package Type: FC-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant

2–40
Arria II Device Handbook Volume 2: Transceivers
Table 2–11
editor.
Table 2–11. Quartus II Assignments for Arria II Devices
From
To
Assignment Name
Value
Note to
(1) You can find the full hierarchy name of the 0 PPM clock driver using the Node Finder feature in the Quartus II
Assignment Editor.
Assignment
Table
lists the Quartus II assignments that you must make in the assignment
2–11:
Full design hierarchy name of one of the following clock drivers that you
choose to drive the tx_coreclk ports of all identical channels (1):
■
■
■
■
■
tx_dataout pins of all identical channels whose tx_coreclk ports are
connected together and driven by the 0 PPM clock driver.
GXB 0 PPM Core Clock Setting
ON
tx_clkout
coreclkout
FPGA CLK input pins
Transceiver REFCLK pins
Clock output from left corner PLLs
Chapter 2: Transceiver Clocking in Arria II Devices
Description
FPGA Fabric-Transceiver Interface Clocking
December 2010 Altera Corporation