EP2AGX190FF35C6N Altera, EP2AGX190FF35C6N Datasheet - Page 419

• Manufacturer Part Number: EP2AGX190FF35C6N
• Description: IC ARRIA II GX 190K 1152FBGA
• Manufacturer: Altera
• Series: Arria II GXr

Specifications of EP2AGX190FF35C6N

• Number Of Logic Elements/cells: 181165
• Number Of Labs/clbs: 7612
• Total Ram Bits: 9939
• Number Of I /o: 612
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 1152-FBGA
• Family Name: Arria® II GX
• Number Of Logic Blocks/elements: 190300
• # I/os (max): 612
• Frequency (max): 400MHz
• Operating Supply Voltage (typ): 900mV
• Logic Cells: 190300
• Ram Bits: 10380902.4
• Operating Supply Voltage (min): 0.87V
• Operating Supply Voltage (max): 0.93V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 1152
• Package Type: FC-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant

Chapter 1: Transceiver Architecture in Arria II Devices
Receiver Channel Datapath
December 2010 Altera Corporation
1
1
Manual Alignment Mode
This mode is automatically used in SONET/SDH functional mode. In Basic mode,
you can configure the word aligner in manual alignment mode by selecting the Use
manual word alignment mode option in the word aligner tab of the ALTGX
MegaWizard Plug-In Manager.
In manual alignment mode, the input signal (rx_enapatternalign) controls the word
aligner. The 8-bit word aligner is edge-sensitive to the rx_enapatternalign signal;
the 10-bit word aligner is level-sensitive to this signal.
If the word alignment pattern is unique and does not appear between word
boundaries, you can constantly hold the rx_enapatternalign signal high because
there is no possibility of false word alignment. If there is a possibility of the word
alignment pattern occurring across word boundaries, you must control the
rx_enapatternalign signal to lock the word boundary after the desired word
alignment is achieved to avoid re-alignment to an incorrect word boundary.
With 8-bit width data, a rising edge on the rx_enapatternalign signal after
de-assertion of the rx_digitalreset signal triggers the word aligner to look for the
word alignment pattern in the received data stream.
In SONET/SDH OC-12 and OC-48 modes, the word aligner looks for 16'hF628 (A1A2)
or 32'hF6F62828 (A1A1A2A2), depending on whether the input signal (rx_a1a2size)
is driven low or high, respectively. In Basic mode, the word aligner looks for the 16-bit
word alignment pattern programmed in the ALTGX MegaWizard Plug-In Manager.
With 10-bit width data, the word aligner looks for the programmed 7-bit or 10-bit
word alignment pattern in the received data stream, if the rx_enapatternalign signal
is held high. It updates the word boundary if it finds the word alignment pattern in a
new word boundary. If the rx_enapatternalign signal is de-asserted low, the word
aligner maintains the current word boundary even when it sees the word alignment
pattern in a new word boundary.
The rx_syncstatus and rx_patterndetect status signals have the same latency as the
datapath and are forwarded to the FPGA fabric to indicate word aligner status. On
receiving the first word alignment pattern after the assertion of the
rx_enapatternalign signal, both the rx_syncstatus and rx_patterndetect signals
are driven high for one parallel clock cycle synchronous to the most significant byte
(MSByte) of the word alignment pattern. Any word alignment pattern received
thereafter in the same word boundary causes only the rx_patterndetect signal to go
high for one clock cycle.
Any word alignment pattern received thereafter in a different word boundary causes
the word aligner to re-align to the new word boundary only if there is a rising edge in
the rx_enapatternalign signal (in the 8-bit word aligner) or if the
rx_enapatternalign signal is held high (in 10-bit word aligner). The word aligner
asserts the rx_syncstatus and rx_patterndetect signals for one parallel clock cycle
whenever it re-aligns to the new word boundary.
Arria II Device Handbook Volume 2: Transceivers
1–33