EP2AGX190FF35C6N Altera, EP2AGX190FF35C6N Datasheet - Page 492

• Manufacturer Part Number: EP2AGX190FF35C6N
• Description: IC ARRIA II GX 190K 1152FBGA
• Manufacturer: Altera
• Series: Arria II GXr

Specifications of EP2AGX190FF35C6N

• Number Of Logic Elements/cells: 181165
• Number Of Labs/clbs: 7612
• Total Ram Bits: 9939
• Number Of I /o: 612
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 1152-FBGA
• Family Name: Arria® II GX
• Number Of Logic Blocks/elements: 190300
• # I/os (max): 612
• Frequency (max): 400MHz
• Operating Supply Voltage (typ): 900mV
• Logic Cells: 190300
• Ram Bits: 10380902.4
• Operating Supply Voltage (min): 0.87V
• Operating Supply Voltage (max): 0.93V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 1152
• Package Type: FC-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant

2–2
Figure 2–1. Input Reference Clock Sources in a Transceiver Block
Note to
(1) One global clock line is available for each CMU PLL and receiver CDR in a transceiver block. This configuration allows each CMU PLL and receiver
Arria II Device Handbook Volume 2: Transceivers
CDR to derive its input reference clock from a separate FPGA CLK input pin.
refclk0
refclk1
Figure
2–1:
/2
/2
Figure 2–1
within a transceiver block.
shows the input reference clock sources for CMU PLLs and receiver CDRs
Global Clock Line (1)
Global Clock Line (1)
Global Clock Line (1)
Global Clock Line (1)
Global Clock Line (1)
Global Clock Line (1)
PLL Cascade Clock
PLL Cascade Clock
PLL Cascade Clock
PLL Cascade Clock
PLL Cascade Clock
PLL Cascade Clock
ITB Clock Lines
ITB Clock Lines
ITB Clock Lines
ITB Clock Lines
ITB Clock Lines
ITB Clock Lines
6
6
6
6
6
6
CMU PLL and Receiver CDR Input Reference Clocking
Chapter 2: Transceiver Clocking in Arria II Devices
CMU1 PLL
CMU0 PLL
CDR
CDR
CDR
CDR
December 2010 Altera Corporation
Transceiver Block
CMU1 Block
CMU0 Block
Channel 3
Channel 2
Channel 1
Channel 0