TMP91xy20AFG Toshiba, TMP91xy20AFG Datasheet - Page 129

• Manufacturer Part Number: TMP91xy20AFG
• Manufacturer: Toshiba

Specifications of TMP91xy20AFG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): M
• Rom Combinations: 8
• Ram Combinations: 8
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 1
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 1
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 77
• Power Supply Voltage(v): 3.0 to 3.6

(4) 8-bit PWM (Pulse width modulation) output mode
TA0REG-WR
(INTTA0 interrupt)
TA0IN
φ T16
φ T1
φ T4
TA0REG and
resolution of 8 bits can be output.
be used as an 8-bit timer.
timer register TA0REG or when 2
TA01MOD<PWM01:00>). The up counter UC0 is cleared when 2
occurs.
TA01MOD<TA0CLK1:0>
TA01RUN<TA0RDE>
UC0 match
This mode is only valid for TMRA0. In this mode, a PWM pulse with the maximum
When TMRA0 is used the PWM pulse is output on the TA1OUT pin. TMRA1 can also
The timer output is inverted when the up counter (UC0) matches the value set in the
The following conditions must be satisfied before this PWM mode can be used.
Figure 3.7.17 shows a block diagram representing this mode.
TA1OUT
overflow
Selector
2
Value set in TA0REG < Value set for 2
Value set in TA0REG ≠ 0
n
Selector
Figure 3.7.17 Block Diagram of 8-Bit PWM Mode
Figure 3.7.16 8-Bit PWM Waveforms
Shift trigger
Internal data bus
8-bit up counter
Register buffer
Comparator
TA0REG
(UC0)
91C820A-127
n
counter overflow occurs (n = 6, 7 or 8 as specified by
TA01RUN<TA0RUN>
Clear
overflow
control
2
n
(PWM cycle)
t
PWM
Overflow
n
counter overflow
TA01MOD
<PWM01:00>
TAFF1
TA1OUT
n
Invert
counter overflow
TMP91C820A
2008-02-20
TA1FFCR
<TA1FFIE>
INTTA0