TMP91xy20AFG Toshiba, TMP91xy20AFG Datasheet - Page 142

• Manufacturer Part Number: TMP91xy20AFG
• Manufacturer: Toshiba

Specifications of TMP91xy20AFG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): M
• Rom Combinations: 8
• Ram Combinations: 8
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 1
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 1
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 77
• Power Supply Voltage(v): 3.0 to 3.6

3.9
Serial Channels
(Asynchronous transmission) or I/O interface mode (Synchronous transmission) can be selected.
master controller start slave controllers via a serial link (A multi-controller system).
operation of channel 0 is explained below.
TMP91C820A includes three serial I/O channels. For each channels either UART mode
(Channel 2 can be selected only UART mode.)
In mode 1 and mode 2 a parity bit can be added. Mode 3 has a wakeup function for making the
Figure 3.9.2, 3.9.3, 3.9.4 are block diagrams for each channel.
Each channel can be used independently.
Each channel operates in the same fashion except for the following points, hence only the
This chapter contains the following sections:
• UART mode
• I/O interface mode
Pin name
IrDA mode
3.9.1
3.9.2
3.9.3
3.9.4
3.9.5
Block Diagrams
Operation of Each Circuit
SFRs
Operation in Each Mode
Support for IrDA
Table 3.9.1 Differences between Channels 0 to 2
TXD0 (PC0)
RXD0 (PC1)
CTS /SCLK0 (PC2)
0
Channel 0
Yes
Mode 0:
Mode 1:
Mode 2:
Mode 3:
91C820A-140
TXD1 (PC3)
RXD1 (PC4)
CTS /SCLK1 (PC5)
For transmitting and receiving I/O data using the
synchronizing signal SCLK for extending I/O.
7-bit data
8-bit data
9-bit data
1
Channel 1
No
TXD2 (PB0)
RXD2 (PB1)
Channel 2
No
TMP91C820A
2008-02-20