TMP91xy20AFG Toshiba, TMP91xy20AFG Datasheet - Page 200
![no-image](/images/manufacturer_photos/0/6/668/toshiba_sml.jpg)
TMP91xy20AFG
Manufacturer Part Number
TMP91xy20AFG
Description
Manufacturer
Toshiba
Datasheet
1.TMP91XY20AFG.pdf
(360 pages)
Specifications of TMP91xy20AFG
Package
LQFP144
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
M
Rom Combinations
8
Ram Combinations
8
Architecture
16-bit CISC
Usb/spi Channels
-
Uart/sio Channels
1
I2c/sio Bus Channels
1
(s)dram Controller
1
Adc 10-bit Channel
8
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
1
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
77
Power Supply Voltage(v)
3.0 to 3.6
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SCK pin output
SO pin output
Shift register
SCK pin
SI pin
Shift register
*: Don’t care
b.
Leading edge shift
Trailing edge shift
Shift edge
edge.
SCK pin input/output).
SCK pin input/output).
Data is transmitted on the leading edge of the clock and received on the trailing
Data is shifted on the leading edge of the serial clock (on the falling edge of the
Data is shifted on the trailing edge of the serial clock (on the rising edge of the
********
76543210 *7654321 **765432 ***76543
Bit0
Bit0
0*******
Figure 3.10.25 Shift Edge
(a) Leading edge
(b) Trailing edge
Bit1
Bit1
10******
91C820A-198
Bit2
Bit2
210*****
Bit3
Bit3
3210**** 43210***
****7654
Bit4
Bit4
*****765
Bit5
Bit5
543210**
******76
Bit6
Bit6
6543210*
******7
Bit7
Bit7
76543210
TMP91C820A
2008-02-20
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