TMP91xy20AFG Toshiba, TMP91xy20AFG Datasheet - Page 79

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TMP91xy20AFG

Manufacturer Part Number
TMP91xy20AFG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP91xy20AFG

Package
LQFP144
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
M
Rom Combinations
8
Ram Combinations
8
Architecture
16-bit CISC
Usb/spi Channels
-
Uart/sio Channels
1
I2c/sio Bus Channels
1
(s)dram Controller
1
Adc 10-bit Channel
8
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
1
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
77
Power Supply Voltage(v)
3.0 to 3.6
3.5.9
Port 7 (P70 to P77)
register. Resetting sets port 7 to input port and all bits of output latch to 1.
(1) Port 70 (SCK, OPTRX0)
Port 7 is an 8-bit general-purpose I/O port. I/O can be set on bit basis using the control
In addition to functioning as a general-purpose I/O port, port 7 also functions as follows.
Writing 1 in the corresponding bit of P7FC, P7FC2 enables the respective functions.
Resetting resets the P7FC, P7FC2 to 0, and sets all bits to input ports.
mode) and OPTRX0 (Receive input for IrDA mode of SIO0).
1.
2.
3.
4.
Port 70 is a general-purpose I/O port. It is also used as SCK (Clock signal for SIO
Used as OPTRX0, it is possible to logical invert by P7<P70>.
For port C1, RXD0 or OPTRX0 is used P7FC2<P70F2>.
SCK output
RXD0
Input/output function for serial bus interface (SCK, SO/SDA, SI/SCL)
Input/output function for IrDA (OPTRX0, OPTTX0)
Extend chip-select output (
Clock control function for voltage booster of external LCD driver (MSK, VEECLK)
(on bit basis)
(on bit basis)
(on bit basis)
Output latch
P7FC2 write
(to SIO0)
Direction
Function
P7FC write
P7CR write
P7 write
Function
control 2
P7 read
control
control
Reset
S
A
B
Selector
Selector
Selector
Figure 3.5.19 Port 70
S
S
S
A
A
B
B
91C820A-77
Logical invert
CS2F
SCK input
,
CS2G
RXD0PC1
(from PORTC1)
,
CSEXA
)
P70 (SCK, OPTRX0)
TMP91C820A
2008-02-20

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