TMP91xy20AFG Toshiba, TMP91xy20AFG Datasheet - Page 84

• Manufacturer Part Number: TMP91xy20AFG
• Manufacturer: Toshiba

Specifications of TMP91xy20AFG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): M
• Rom Combinations: 8
• Ram Combinations: 8
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 1
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 1
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 77
• Power Supply Voltage(v): 3.0 to 3.6

P7
(0013H)
P7CR
(0016H)
P7FC
(0017H)
P7FC2
(001CH)
P7ODE
(001FH)
Note:
Bit symbol
Read/Write
After reset
Bit symbol
Read/Write
After reset
Function
Bit symbol
Read/Write
After reset
Function
Bit symbol
Read/Write
After reset
Function
Bit symbol
Read/Write
After reset
Function
Read-modify-write is prohibited for P7CR, P7FC, P7FC2 and P7ODE.
0:Port
1:VEECLK
Always
write “0”.
Always write “0”.
P77C
P77F
P77
7
7
7
7
7
0
−
−
0
W
MSK
select
0: Enable
1: Enable
Always
write “0”.
P76C
P76F
P76
6
6
6
6
6
0
−
−
0
Figure 3.5.24 Register for Port 7
Data from external port (Output latch register is set to 1.)
0: Port
0: <P75F>
1: CSEXA
P75F2
P75C
P75F
Port 7 Function Register 2
P75
Port 7 Function Register
5
5
0
5
5
Port 7 Control Register
5
Port 7 ODE Register
91C820A-82
0: Input
Port 7 Register
0: Port
0: <P74F>
1: CS2G
P74F2
P74C
P74F
P74
4
4
4
0
4
4
R/W
W
W
W
0
0
0: Port
0: <P73F>
1: CS2F
P73F2
P73C
P73F
P73
3
3
3
3
0
3
1: Output
0: Port
1: SCL/SI
Always write
“0”.
0: 3 states
1: Open drain
ODEP72
P72C
P72F
P72
2
2
2
2
2
0
–
0
W
0: Port
1:
0: <P71F>
1: OPTTX0
ODEP71
P71F2
SDA/SO
P71C
P71F
P71
1
1
1
1
1
0
0
SIO0/RXD0
Pin select
0: RXD0(PC1)
1: OPTRX0
0: Port
1: SCK
TMP91C820A
P70F2
P70C
P70F
P70
0
0
0
0
0
0
2008-02-20
(P70)