TMP91xy20AFG Toshiba, TMP91xy20AFG Datasheet - Page 297

• Manufacturer Part Number: TMP91xy20AFG
• Manufacturer: Toshiba

Specifications of TMP91xy20AFG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): M
• Rom Combinations: 8
• Ram Combinations: 8
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 1
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 1
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 77
• Power Supply Voltage(v): 3.0 to 3.6

(3) Timer registers (TB0RG0 and TB0RG1)
counter UC0 matches the value set in this timer register, the comparator match detect
signal will go active.
2-byte data transfer instruction or using 1-byte date transfer instruction twice for
lower 8 bits and upper 8 bits in order.
The TB0RG0 timer register has a double-buffer structure, which is paired with register
buffer. The value set in TB0RUN<TB0RDE> determines whether the double-buffer
structure is enabled or disabled: it is disabled when <TB0RDE> = 0, and enabled when
<TB0RDE> = 1.
timer register when the values in the up counter (UC0) and the timer register TB0RG1
match.
after a reset, data should be written to it beforehand.
double buffer, write data to the timer register, set <TB0RDE> to 1, then write data to
the register buffer as shown below.
and 000189H) allocated to them. If <TB0RDE> = 0, the value is written to both the
timer register and the register buffer. If <TB0RDE> = 1, the value is written to the
register buffer only.
These two 16-bit registers are used to set the interval time. When the value in the up
Setting data for both upper and lower timer registers is needed. For example, using
When the double buffer is enabled, data is transferred from the register buffer to the
After a reset, TB0RG0 and TB0RG1 are undefined. If the 16-bit timer is to be used
On a reset <TB0RDE> is initialized to 0, disabling the double buffer. To use the
TB0RG0 and the register buffer both have the same memory addresses (000188H
The addresses of the timer registers are as follows:
The timer registers are write-only registers and thus cannot be read.
TMRB0
Upper 8 bits
(TB0RG0H)
000189H
TB0RG0
Lower 8 bits
(TB0RG0L)
91C820A-295
000188H
Upper 8 bits
(TB0RG1H)
00018BH
TB0RG1
Lower 8 bits
(TB0RG1L)
00018AH
TMP91C820A
2008-02-20