TMP91xy20AFG Toshiba, TMP91xy20AFG Datasheet - Page 240

no-image

TMP91xy20AFG

Manufacturer Part Number
TMP91xy20AFG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP91xy20AFG

Package
LQFP144
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
M
Rom Combinations
8
Ram Combinations
8
Architecture
16-bit CISC
Usb/spi Channels
-
Uart/sio Channels
1
I2c/sio Bus Channels
1
(s)dram Controller
1
Adc 10-bit Channel
8
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
1
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
77
Power Supply Voltage(v)
3.0 to 3.6
LCDCTL
(04B3H)
Bit symbol
Read/Write
After reset
Function
pin
0: Display
1: Display
DOFF
LCDON
OFF
ON
R/W
7
0
0: Normal
1: All
Transfer
data of
exclusive
bus for
LCD
display
data 0
ALL0
R/W
6
0
Divided
FR mode
0: Disable
1: Enable
FRMON
LCD Control Register
R/W
5
0
91C820A-238
Always
write “0”.
R/W
4
0
Setting bit9
for f
R/W
FP9
FP
3
0
[9:0]
Note:This bit forces sending data to
Note: This bit determines the status of
0:
1:
Specify
address of
LCD driver
with
built-in
RAM
0: Sequential
1: Random
MMULCD
DOFF
DOFF
R/W
LCD driver to 0 (Data off) by
writing 1. Usually this bit is 0.
LCDC start/stop bit
Type select for internal
RAM LCD driver
LCD Driver pin
DOFF
Frame invert adjustment function
All data of exclusive bus for LCD
(LD7:0)
2
0
0
0
0
0
0
1
1
1
1
1
pin outputs 0
pin outputs 1
LCDC START
LCDC STOP
Sequential access type
(No address pin in LCD driver)
Random access type
(Address pin in LCD driver)
Disable
Enable
Normal
All 0
Driver OFF
Driver ON
pin
Setting
bit8 for
f
FP
FP8
R/W
[9:0]
1
0
DOFF
TMP91C820A
Start
control in
SR type
0: STOP
1: START
START
R/W
2008-02-20
0
0

Related parts for TMP91xy20AFG