TMP91xy20AFG Toshiba, TMP91xy20AFG Datasheet - Page 210

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TMP91xy20AFG

Manufacturer Part Number
TMP91xy20AFG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP91xy20AFG

Package
LQFP144
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
M
Rom Combinations
8
Ram Combinations
8
Architecture
16-bit CISC
Usb/spi Channels
-
Uart/sio Channels
1
I2c/sio Bus Channels
1
(s)dram Controller
1
Adc 10-bit Channel
8
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
1
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
77
Power Supply Voltage(v)
3.0 to 3.6
ADREG26L
ADREG26H
ADREG37L
ADREG37H
(02A4H)
(02A6H)
(02A7H)
(02A5H)
Channel x conversion
result
Bit symbol
Read/Write
After reset
Function
Bit symbol
Read/Write
After reset
Function
Bit symbol
Read/Write
After reset
Function
Bit symbol
Read/Write
After reset
Function
Stores lower 2 bits of AD
Stores lower 2 bits of AD
ADR21
ADR29
ADR31
ADR39
conversion result.
conversion result.
7
7
7
7
Undefined
Undefined
Figure 3.11.5 AD Converter Related Registers
R
R
ADREGxH
9
ADR20
ADR28
ADR30
ADR38
7
AD Conversion Result Lower Register 2/6
AD Conversion Result Upper Register 3/7
AD Conversion Data Upper Register 2/6
AD Conversion Data Lower Register 3/7
6
6
6
6
8
6
7
5
91C820A-208
ADR27
ADR37
4
Stores upper 8 bits of AD conversion result.
Stores upper 8 bits of AD conversion result.
6
5
5
5
5
• Bits 5 to1 are always read as 1.
• Bit0 is the AD conversion data storage flag <ADRxRF>. When the AD
conversion result is stored, the flag is set to 1. When either of the
registers (ADREGxH, ADREGxL) is read, the flag is cleared to 0.
3
5
2
4
ADR26
ADR36
1
4
4
4
4
3
Undefined
Undefined
0
2
R
R
ADR25
ADR35
1
7
3
3
3
3
0
6
5
ADR24
ADR34
4
2
2
2
2
3
2
ADR23
ADR33
ADREGxL
1
1
1
1
1
TMP91C820A
0
2008-02-20
AD
conversion
data storage
flag
1: Conversion
AD
conversion
data storage
flag
1: Conversion
ADR2RF
ADR3RF
result
stored
result
stored
ADR22
ADR32
0
R
0
0
R
0
0
0

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