TMP91xy20AFG Toshiba, TMP91xy20AFG Datasheet - Page 144

• Manufacturer Part Number: TMP91xy20AFG
• Manufacturer: Toshiba

Specifications of TMP91xy20AFG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): M
• Rom Combinations: 8
• Ram Combinations: 8
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 1
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 1
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 77
• Power Supply Voltage(v): 3.0 to 3.6

with PC2
with PC2
with PC1
Shared
Shared
Shared
SCLK0
SCLK0
RXD0
3.9.1
f
φT0
SYS
SC0MOD0
<RXE>
φT0
φT2
φT8
φT32
Block Diagrams
RXDCLK
RB8
I/O interface mode
Figure 3.9.2 is a block diagram representing serial channel 0.
Serial clock generation circuit
Receive buffer 1 (Shift register)
<BR0CK1, 0>
BR0CR
2
Receive buffer 2 (SC0BUF)
(Only UART ÷ 16)
φT2
4
Prescaler
Receive
Receive
counter
control
<BR0S3:0>
8
BR0CR
φT8 φT32
16 32 64
Figure 3.9.2 Block Diagram of the Serial Channel 0
Baud rate
generator
<BR0ADDE>
BR0CR
<OERR><PERR><FERR>
<BR0K3:0>
SC0MOD0
<WU>
BR0ADD
Internal data bus
<PE>
Parity control
SC0CR
Error flag
÷2
SC0CR
91C820A-142
Serial channel
<EVEN>
(from TMRA0)
interrupt
TA0TRG
control
SC0MOD0
<SC1:0>
SC0CR
<IOC>
I/O
interface mode
UART
mode
TXDCLK
SC0MOD0
TB8
<SM1:0>
Transmission buffer (SC0BUF)
(Only UART
Transmission
Transmision
counter
control
SIOCLK
÷
16)
SC0MOD0
<CTSE>
TMP91C820A
INT request
INTRX0
INTTX0
2008-02-20
Shared
with PC2
TXD0
Shared
with PC0
CTS0