TMP91xy20AFG Toshiba, TMP91xy20AFG Datasheet - Page 304

• Manufacturer Part Number: TMP91xy20AFG
• Manufacturer: Toshiba

Specifications of TMP91xy20AFG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): M
• Rom Combinations: 8
• Ram Combinations: 8
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 1
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 1
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 77
• Power Supply Voltage(v): 3.0 to 3.6

3.18 Hardware Standby Function
Note 1:
Note 2: Shifting time is 2 to 10 clock times of f
Power save condition
Reset condition
(Release PS mode)
Note: Settings of SYSCR2<DRVE> and <SELDRV> at HALT mode are effective as well as PS condition.
Shifting time
(Note 2
PS
RESET
f
SYS
HALT Mode Setting
(
protect from program runaway by supplying power voltage down. Especially, it’s useful in case
of battery using.
Note1)
write SYSCR2<PSENV> to 1.
PS
TMP91C820A have hardware standby circuit that is able to save the power consumption and
It can be shifted to “PS condition” by fixed
Figure 3.18.1 shows timing diagram of transition of PS condition below.
PS mode can release only external system reset.
PS condition
pin is effective after RESET because SYSCR2<PSENV> to 0. If you use as
Table 3.18.1 Power Save Mode Conditions of Each HALT Mode
Figure 3.18.1 Hardware Standby Timing Diagram
+ High-frequency stop
IDLE1 mode
IDLE2
91C820A-302
SYS
.
PS
+ High-frequency stop
pin to “low” level.
IDLE1 mode
Keep to
IDLE1
PS
pin
More than 10 clock
STOP mode
STOP
NMI
TMP91C820A
2008-02-20
pin, please