TMP91xy20AFG Toshiba, TMP91xy20AFG Datasheet - Page 193
![no-image](/images/manufacturer_photos/0/6/668/toshiba_sml.jpg)
TMP91xy20AFG
Manufacturer Part Number
TMP91xy20AFG
Description
Manufacturer
Toshiba
Datasheet
1.TMP91XY20AFG.pdf
(360 pages)
Specifications of TMP91xy20AFG
Package
LQFP144
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
M
Rom Combinations
8
Ram Combinations
8
Architecture
16-bit CISC
Usb/spi Channels
-
Uart/sio Channels
1
I2c/sio Bus Channels
1
(s)dram Controller
1
Adc 10-bit Channel
8
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
1
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
77
Power Supply Voltage(v)
3.0 to 3.6
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<TRX>
1
0
<AL>
1
0
1
0
b.
<AAS> <AD0>
If <MST> = 0 (Slave mode)
slave mode after losing arbitration.
receives a slave address or a GENERAL CALL from the master device, or when a
GENERAL CALL is received and data transfer is complete, or after matching
received address. In the master mode, the TMP91C820A operates in a slave mode
if it losing arbitration. An INTSBI interrupt request occurs when a word data
transfer terminates after losing arbitration. When an INTSBI interrupt request
occurs the <PIN> is cleared to 0 and the SCL pin is pulled down to the low-level.
Either reading/writing from/to the SBI0DBR or setting the <PIN> to 1 will release
the SCL pin after taking t
processes according to conditions listed in the next table.
1
1
0
1
0
1
0
In the slave mode the TMP91C820A operates either in normal slave mode or in
In the slave mode, an INTSBI interrupt request occurs when the TMP91C820A
Check the SBI0SR<AL>, <TRX>, <AAS>, and <AD0> and implements
Table 3.10.1 Operation in the Slave Mode
1/0
1/0
1/0
0
0
0
0
The TMP91C820A loses arbitration when
transmitting a slave address and receives
a slave address for which the value of the
direction bit sent from another master is 1.
In salve receiver mode the TMP91C820A
receives a slave address for which the
value of the direction bit sent from the
master is 1.
In salve transmitter mode a single word of
is transmitted.
Set <BC2:0> to the number of bits in a
word.
The TMP91C820A loses arbitration when
transmitting a slave address and receives
a slave address or GENERAL CALL for
which the value of the direction bit sent
from another master is 0.
The TMP91C820A loses arbitration when
transmitting a slave address or data and
terminates word data transfer.
In slave receiver mode the TMP91C820A
receives a slave address or GENERAL
CALL for which the value of the direction
bit sent from the master is 0.
In slave receiver mode the TMP91C820A
terminates receiving word data.
91C820A-191
LOW
Conditions
time.
Set the number of bits a word in
<BC2:0> and write the transmitted
data to SBI0DBR.
Check the <LRB> setting. If <LRB>
is set to 1, set <PIN> to 1 since the
receiver win no request the data
which follows. Then, clear <TRX> to
0 to release the bus. If <LRB> is
cleared to 0 of and write the
transmitted data to SBI0DBR since
the receiver requests next data.
Read the SBI0DBR for setting the
<PIN> to 1 (Reading dummy data)
or set the <PIN> to 1.
Set <BC2:0> to the number of bits in
a word and read the received data
from SBI0DBR.
Process
TMP91C820A
2008-02-20
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