RS8973 Mindspeed Technologies, RS8973 Datasheet - Page 29

• Manufacturer Part Number: RS8973
• Description: Single-chip Sdsl/hdsl Transceiver
• Manufacturer: Mindspeed Technologies

RS8973
Single-Chip SDSL/HDSL Transceiver
2.2.1 Variable Gain Amplifier
Figure 2-2. First-Order Echo Cancellation Using the Variable Gain Amplifier
2.2.2 Analog-to-Digital Converter
N8973DSD
(Twisted Pair)
Line
Transformer
Line
+
–
2.2 Receive Section
Like the transmit section, the receive section consists of both analog and digital
circuitry. The VGA provides the interface to the analog signals received from the
line and the hybrid. The ADC then digitizes the analog signal so it can be further
processed in the DSP section of the receiver. The receiver DSP section includes
front-end processing, echo cancellation, equalization, and symbol detection.
The VGA has two purposes. The first is to provide a dual-differential analog input
so the pseudo-transmit signal created by the hybrid can be subtracted from the
signal received from the line transformer. This subtraction provides first-order
echo cancellation, which results in a first-order approximation of the signal
received from the line.
circuit interconnections. All off-chip circuitry, including the hybrid and anti-alias
filters, consists entirely of passive components. Further echo cancellation occurs
in the receiver DSP.
received signal prior to passing it to the ADC. This reduces the resolution
required for the ADC. There are six gain settings ranging from 0 dB to 15 dB (this
is the gain setting range in relative terms; the physical settings range from – 3 dB
to 12 dB). The gain is controlled through the gain[2:0] control bits in the ADC
Control Register [adc_control; 0x21]. See
detailed description of the gain[2:0] control bits.
The ADC provides 16 bits of resolution. The analog input from the variable gain
amplifier is converted into digital data and output at the symbol rate.
Impedance
Resistors
Matching
The second purpose of the VGA is to provide programmable gain of the
Line
Preliminary Information
+
–
Hybrid
Conexant
Off-Chip Circuitry
Figure 2-2
Anti-alias
Anti-alias
Filter
Filter
illustrates the recommended echo-cancellation
RXBN
RXBP
On-Chip Circuitry
Chapter 3.0,
RXN
RXP
TXN
TXP
+
–
+
–
+
–
Driver
Line
Registers, for a more
2.0 Functional Description
+
–
2.2 Receive Section
Gain[2:0]
To
ADC
2-5