RS8973 Mindspeed Technologies, RS8973 Datasheet - Page 32

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RS8973

Manufacturer Part Number
RS8973
Description
Single-chip Sdsl/hdsl Transceiver
Manufacturer
Mindspeed Technologies
Datasheet

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2.0 Functional Description
2.2 Receive Section
2.2.4 Impulse Shortening Filter
2-8
2.2.3.3 DC Level Meter
2.2.3.6 Far-End Level
2.2.3.7 Far-End Level
2.2.3.4 Signal Level
2.2.3.5 Overflow
and Monitoring
2.2.3.2 Offset
Adjustment
Detection
Alarm
Meter
Meter
A nonzero DC level on the input can be corrected by a DC offset value
[dc_offset_low, dc_offset_high; 0x26, 0x27], which is subtracted from the input.
The DC offset is a 16-bit number and is programmed through the microcomputer
interface.
The DC level meter provides the monitoring needed for adaptive offset
compensation. The offset-adjusted input signal is accumulated over the meter
timer interval [meter_low, meter_high; 0x18, 0x19]. The 16 MSBs are placed into
the DC Level Meter Registers [dc_meter_low, dc_meter_high; 0x44, 0x45].
The Signal Level Meter provides the monitoring needed for adjusting the analog
gain circuit located before the ADC. The absolute value of the offset adjusted
input signal is accumulated over the meter timer interval [meter_low, meter_high;
0x18, 0x19]. The 16 MSBs are placed in the Signal Level Meter Registers
[slm_low, slm_high; 1; 0x46, 0x47].
The overflow sensor detects ADC overflows. The overflow monitor counts the
number of overflows, as indicated by the overflow sensor during the meter timer
interval [meter_low, meter_high; 0x18, 0x19]. The counter is limited to 8 bits. In
the case of 256 or more overflows during the measurement interval, the counter
will hold at 255. The counter is loaded into the Overflow Meter Register
[overflow_meter; 0x42] at the end of each measurement interval.
The Far-end Level Meter monitors the output of the echo canceller, which is
called the far-end signal because the echo of the transmitted signal is subtracted
from it. This value is accumulated over the meter timer interval [meter_low,
meter_high; 0x18, 0x19]. The 16 MSBs are placed into the Far-End Level Meter
Register [felm_low, felm_high; 0x48, 0x49].
The result of the far-end level meter is compared to two thresholds. When these
are exceeded, an interrupt is sent to the microcomputer interface if the
corresponding FELM interrupt is enabled. The thresholds are determined by the
value in the Far-End High Alarm Threshold Registers
[far_end_high_alarm_th_low, far_end_high_alarm_th_high; 0x30, 0x31] and the
Far-End Low Alarm Threshold Registers [far_end_low_alarm_th_low,
far_end_low_alarm_th_high; 0x32, 0x33].
IRQ Source Register [irq_source; 0x05]. The interrupts high_felm and low_felm
can be masked by writing a 1 to bits 2 and 1, respectively, of the Interrupt Mask
Register High [mask_high_reg; 0x03].
The impulse shortening (IS) filter is a high pass filter which pre-equalizes the
channel and eliminates long tails caused by the transformer.
The interrupts high_felm and low_felm are bits 2 and 1, respectively, of the
Preliminary Information
Conexant
Single-Chip SDSL/HDSL Transceiver
N8973DSD
RS8973

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