RS8973 Mindspeed Technologies, RS8973 Datasheet - Page 73

• Manufacturer Part Number: RS8973
• Description: Single-chip Sdsl/hdsl Transceiver
• Manufacturer: Mindspeed Technologies

RS8973
Single-Chip SDSL/HDSL Transceiver
A 2-byte read-only register containing the 16 MSBs of the 32-bit, 2s-complement DC-level meter accumulator.
This meter sums the value of the receive signal input path—after DC offset correction but before echo
cancellation—over each Meter Timer countdown interval. Automatically loaded at the end of each interval, the
meter register must be read low byte first, followed by high byte, unseparated by any other meter access
(addresses 0x40 to 0x5F).
A 2-byte read-only register containing 16 MSBs of the 32-bit unsigned signal-level meter accumulator. This
meter sums the absolute value of the receive signal input path—after DC offset correction but before echo
cancellation (same point as the DC level meter)—over each Meter Timer countdown interval. Automatically
loaded at the end of each interval, the meter register must be read low byte first, followed by high byte,
unseparated by any other meter access (addresses 0x40 to 0x5F).
A 2-byte read-only register containing 16 MSBs of the 32-bit unsigned far-end level meter accumulator. This
meter sums the absolute value of the receive signal path—after echo cancellation but before the DAGC
function—over each Meter Timer countdown interval. Automatically loaded at the end of each interval, this
meter register must be read low byte first, followed by high byte, unseparated by any other meter access
(addresses 0x40 to 0x5F).
N8973DSD
0x44, 0x45—DC Level Meter Register (dc_meter_low, dc_meter_high)
0x46, 0x47—Signal Level Meter Register (slm_low, slm_high)
0x48, 0x49—Far-End Level Meter Register (felm_low, felm_high)
D[23]
D[31]
D[23]
D[31]
D[23]
D[31]
7
7
7
D[22]
D[30]
D[22]
D[30]
D[22]
D[30]
6
6
6
D[21]
D[29]
D[21]
D[29]
D[21]
D[29]
5
5
5
Preliminary Information
D[20]
D[28]
D[20]
D[28]
D[20]
D[28]
4
4
4
Conexant
D[19]
D[27]
D[19]
D[27]
D[19]
D[27]
3
3
3
D[18]
D[26]
D[18]
D[26]
D[18]
D[26]
2
2
2
D[17]
D[25]
D[17]
D[25]
D[17]
D[25]
3.3 Register Description
1
1
1
3.0 Registers
D[16]
D[24]
D[16]
D[24]
D[16]
D[24]
0
0
0
3-27