RS8973 Mindspeed Technologies, RS8973 Datasheet - Page 66

• Manufacturer Part Number: RS8973
• Description: Single-chip Sdsl/hdsl Transceiver
• Manufacturer: Mindspeed Technologies

3.0 Registers
3.3 Register Description
A 3-byte read/write register used for device testing by Conexant. This register is automatically initialized to
0x000000 upon RST assertion and initial power application. This register must be initialized according to the
software provided by Conexant.
pll_phase_offset_high)
A 2-byte read/write register interpreted as a 16-bit, 2s-complement number. The value of this register is
subtracted from the output of the timing-recovery phase detector after the phase-detector meter, but before the
loop compensation filter.
A 2-byte read/write register interpreted as a 16-bit, 2s-complement number. The value of this register is
subtracted from the receiver signal path at the output of the ADC block, ahead of the DC level and signal level
meters.
tx_calibrate[3:0]
3-20
0x23—Test Register (test_reg23)
0x24, 0x25—Timing Recovery PLL Phase Offset Register (pll_phase_offset_low,
0x26, 0x27—Receiver DC Offset Register (dc_offset_low, dc_offset_high)
0x28—Transmitter Calibration Register (tx_calibrate)
—
7
Transmit Calibrate—4-bit, 2s-complement, read-only field containing the nominal setting for
the transmitter gain. The value of the Transmit Calibration Register is set during
manufacturing testing by Conexant, and corresponds to the value required to operate the
RS8973 at a nominal 13.5 dBm transmit power, assuming the recommended transformer
coupling/hybrid circuit is used. Users can override this calibration by writing their own value
into the Transmitter Gain Register [tx_gain; 0x29].
—
6
tx_calibrate[3]
5
tx_calibrate[2]
Preliminary Information
4
Conexant
tx_calibrate[1]
3
tx_calibrate[0]
Single-Chip SDSL/HDSL Transceiver
2
—
1
N8973DSD
RS8973
—
0