PM7311 pmc-sierra, PM7311 Datasheet - Page 103

• Manufacturer Part Number: PM7311
• Description: Freedm 84a1024l Assp Telecom Standard Datasheet
• Manufacturer: pmc-sierra

Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC-2021832, Issue 2
Register 0x004: FREEDM 84A1024L Master High Priority Interrupt Enable
This register provides interrupt enables for various events detected or initiated by the FREEDM
84A1024L. Each interrupt enable bit corresponds to the equivalent bit in the Master High Priority
Interrupt Status register. All interrupt enable bits are active high. When high, interrupts are
enabled. When low, interrupts are masked. While interrupts are masked the status bit in the status
register may still be polled to detect the error event. Enabled High priority interrupts cause the
INTHIB interrupt pin to be asserted.
Reserved
The Reserved bits must be set to 0 for correct operation of the FREEDM 84A1024L device.
Bit
Bit 31
To
Bit 22
Bit 21
Bit 20
Bit 19
Bit 18
Bit 17
Bit 16
Bit 15
Bit 14
Bit13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
FREEDM 84A1024L ASSP Telecom Standard Product Data Sheet
Function
Unused
CBLTEXE
SBIC1FPSE
SDGMDE
CBAEXE
Reserved
Reserved
UNSUPHE
BADSIZEE
RSFPPEE
EFPPEE
IFPPEE
DLLE
SBIPARI
TXCHQOVRE
CFOVRE
TPRTYE
TFOVRE
TFUDRE
SRAMPE
UECCRSE
UECCCBE
RFOVRE
Default
X
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Released
103