PM7311 pmc-sierra, PM7311 Datasheet - Page 217

• Manufacturer Part Number: PM7311
• Description: Freedm 84a1024l Assp Telecom Standard Datasheet
• Manufacturer: pmc-sierra

Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC-2021832, Issue 2
Register 0x9A4: BIST Enable
Each control bit in this register enables the BIST test of all memories controlled by the selected
BIST sequencer. All memories in a selected block will be tested at the same time. It should be
noted that for BIST to work, all clocks must be the same frequency (SYSCLK, RXCLK,
TXCLK) and the maximum frequency of operation is 40MHz. Of the BIST sequencers above,
RAPI-12 is run off RXCLK. All other BIST sequencers are run off SYSCLK. This feature is
intended for production testing as opposed to on board testing. If this feature is desired for on
board testing, the simplest solution is to set TAPI-12_EN and RAPI-12_EN to 0 (i.e. don’t BIST
test these memories) and set SYSCLK=52MHz.
Bit
Bit 31
To
Bit 16
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Type
—
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
FREEDM 84A1024L ASSP Telecom Standard Product Data Sheet
Function
Unused
TAPI-12_EN
RAPI-12_EN
FRMBLD_EN
EQM-12_EN
IQM-12_EN
CB_DRAMC_EN
RS_DRAMC_EN
TFRAG_EN
RFRAG_EN
PM-12_EN
THDL-12_EN
RHDL-12_EN
TCAS-12_EN
RCAS-12_EN
INSBI_EN
EXSBI_EN
Default
X
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Released
217