PM7311 pmc-sierra, PM7311 Datasheet - Page 15

• Manufacturer Part Number: PM7311
• Description: Freedm 84a1024l Assp Telecom Standard Datasheet
• Manufacturer: pmc-sierra

Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC-2021832, Issue 2
Table 35 PM-12 Memory Map ..................................................................................................236
Table 36 EQM-12 Memory Map................................................................................................239
Table 37 TFRAG Any-PHY Channel RAM Memory Map .........................................................242
Table 38 RFRAG Memory Map ................................................................................................243
Table 39 RS Memory Map ........................................................................................................246
Table 40 Sequenced Connection Identifier Lookup Record .....................................................248
Table 41 Non-sequenced Connection Identification Lookup Record .......................................248
Table 42 Control Connection Identifier Lookup Record............................................................248
Table 43 Corrupt Connection Identifier Lookup Record ...........................................................248
Table 44 LSB Records Status Record ......................................................................................248
Table 45 MSB Records Record ................................................................................................249
Table 46 LSB Record Freelist Record ......................................................................................249
Table 47 Chunk Buffer Memory Map (Only Even Addresses are Valid) ..................................250
Table 48 Connection Context Memory Addressing ..................................................................252
Table 49 CC Memory Map ........................................................................................................252
Table 50 Test Mode Register Memory Map .............................................................................257
Table 51 Instruction Register (Length - 3 Bits) .........................................................................258
Table 52 FREEDM 84A1024L Absolute Maximum Ratings .....................................................278
Table 53 Normal Operating Conditions.....................................................................................279
Table 54 Power Requirements .................................................................................................280
Table 55 FREEDM 84A1024L D.C. Characteristics .................................................................282
Table 56 REFCLK Timing .........................................................................................................283
Table 57 SBI336 Drop Bus Input Timing (Referenced to Figure 62)........................................284
Table 58 SBI336 Add Bus Input Timing (Referenced to Figure 63 ) ........................................284
Table 59 SBI336 Add Bus Output Timing (Referenced to Figure 64 and Figure
Table 60 Clock/Data Input (Figure 66)......................................................................................286
Table 61 Clock/Data Output (Figure 67) ...................................................................................286
Table 62 Any-PHY Level 2 Interface (Figure 68 and Figure 69)...............................................287
Table 63 Any-PHY Level 3 Interface (Figure 68 and Figure 69)...............................................287
Table 64 Microprocessor Interface (Figure 70).........................................................................289
Table 65 SYSCLK Timing .........................................................................................................290
Table 66 Resequencing SDRAM Interface (Figure 70) ............................................................290
Table 67 Chunk Buffer SDRAM Interface (Figure 70) ..............................................................290
Table 68 Connection Context Memory SSRAM Interface (Figure 70)......................................290
Table 69 JTAG Port Interface (Figure 71).................................................................................291
Table 70 Central Office Thermal Information............................................................................293
65)........................................................................................................................................285
FREEDM 84A1024L ASSP Telecom Standard Product Data Sheet
Released
15