PM7311 pmc-sierra, PM7311 Datasheet - Page 187

• Manufacturer Part Number: PM7311
• Description: Freedm 84a1024l Assp Telecom Standard Datasheet
• Manufacturer: pmc-sierra

Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC-2021832, Issue 2
Register 0x68C: SBI INSERT T1 Frame Pulse Offset Register
This register controls the T1 Frame pulse offset. This register is only required when operating in
synchronous mode (SYNCH_TRIB=1).
OFFSET_T1[11:0]
Reserved
This parameter must be programmed to OFFSET T1[11:0] = 1400 (decimal) or 0101 0111
1000 (binary) for correct operation of the device.
The reserved bit must be left high for correct operation of the FREEDM 84A1024L device.
Bit
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Type
R
R
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
FREEDM 84A1024L ASSP Telecom Standard Product Data Sheet
Function
Unused
Unused
Unused
Reserved
OFFSET_T1[11]
OFFSET_T1[10]
OFFSET_T1[9]
OFFSET_T1[8]
OFFSET_T1[7]
OFFSET_T1[6]
OFFSET_T1[5]
OFFSET_T1[4]
OFFSET_T1[3]
OFFSET_T1[2]
OFFSET_T1[1]
OFFSET_T1[0]
Default
0
0
0
1
0
0
1
1
1
0
0
0
0
1
0
0
Released
187