PM7311 pmc-sierra, PM7311 Datasheet - Page 35

• Manufacturer Part Number: PM7311
• Description: Freedm 84a1024l Assp Telecom Standard Datasheet
• Manufacturer: pmc-sierra

Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC-2021832, Issue 2
Pin Name
TXDATA[0]
TXDATA[1]
TXDATA[2]
TXDATA[3]
TXDATA[4]
TXDATA[5]
TXDATA[6]
TXDATA[7]
TXDATA[8]
TXDATA[9]
TXDATA[10]
TXDATA[11]
TXDATA[12]
TXDATA[13]
TXDATA[14]
TXDATA[15]
TXPRTY
Type
Input
Input
Pin
No.
P5
N1
N2
N3
N5
M1
M2
M3
M4
M5
L2
L3
L4
K1
K2
K3
K4
FREEDM 84A1024L ASSP Telecom Standard Product Data Sheet
Function
address other than Any-PHY channels residing in the
FREEDM is provided on TXADDR[15:0]. The TPA poll
response is invalid if it corresponds to a TXADDR poll
coincident with the start of a segment transfer (i.e. on the cycle
in which TSX is driven high).
TPA_xx are 0 when an unprovisioned channel is polled.
Any-PHY Level 2 Mode
The transmit data signals (TXDATA[15:0]) contain the transmit
Any-PHY packet interface (APPI) data provided by the
external controller. Data must be presented in big endian
order, i.e. the byte in TXDATA[15:8] is transmitted by the
FREEDM 84A1024L before the byte in TXDATA[7:0].
The first word of each data transfer contains an address to
identify the device and Any-PHY channel associated with the
data being transferred. This prepended address must be
qualified with the TSX signal. The FREEDM 84A1024L
compares the first two bytes to the base and range registers to
determine if the Any-PHY channel resides within the FREEDM
84A1024L.The FREEDM 84A1024L will not respond to Any-
PHY channel addresses outside the high and low address
registers stored in the TAPI-12 base and range address
registers.
Bit 10 of the prepended address indicates the priority level of
the data. Bit 10 = 0 indicates low priority and Bit 10 = 1
indicates high priority.
The second and any subsequent words of each data transfer
contain packet data.
The TXDATA[15:0] signals are sampled on the rising edge of
TXCLK.
Any-PHY Level 3 Mode:
The transmit data signals (TXDATA[7:0]) contain the transmit
Any-PHY packet interface (APPI) data provided by the
external controller.
The first two bytes of each data transfer contains an address
to identify the device and Any-PHY channel associated with
the data being transferred. The first byte of this prepended
address must be qualified with the TSX signal. The FREEDM
84A1024L compares the first two bytes to the TAPI-12 base
and range registers to determine if the Any-PHY channel
resides within the FREEDM 84A1024L.The FREEDM
84A1024L will not respond to Any-PHY channel addresses
outside the base and range registers.
Bit 10 of the prepended address (bit 2 of the first byte of the
transfer) indicates the priority level of the data. Bit 10 = 0
indicates low priority and Bit 10 = 1 indicates high priority.
The third and any subsequent bytes of each data transfer
contain packet data.
The TXDATA[7:0] signals are sampled on the rising edge of
TXCLK.
TXDATA[15:8] are not used by FREEDM 84A1024L when
operating in Any-PHY Level 3 mode and should be tied low.
Any-PHY Level 2 Mode:
Released
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