p2125vps20 Renesas Electronics Corporation., p2125vps20 Datasheet - Page 107
p2125vps20
Manufacturer Part Number
p2125vps20
Description
16-bit Single-chip Microcomputer H8s Family / H8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.P2125VPS20.pdf
(700 pages)
- Current page: 107 of 700
- Download datasheet (5Mb)
4.3
A reset has the highest exception priority. When the RES pin goes low, all processing halts and
this LSI enters the reset state. To ensure that this LSI is reset, hold the RES pin low for at least 20
ms at power-on. To reset the chip during operation, hold the RES pin low for at least 20 states. A
reset initializes the internal state of the CPU and the registers of on-chip peripheral modules. The
chip can also be reset by overflow of the watchdog timer. For details, see section 14, Watchdog
Timer (WDT).
4.3.1
When the RES pin goes high after being held low for the necessary time, this LSI starts reset
exception handling as follows:
1. The internal state of the CPU and the registers of the on-chip peripheral modules are initialized
2. The reset exception handling vector address is read and transferred to the PC, and then
Figure 4.1 shows an example of the reset sequence.
and the I bit in CCR is set to 1.
program execution starts from the address indicated by the PC.
Reset
Reset Exception Handling
Rev. 1.00 Sep. 21, 2006 Page 69 of 658
Section 4 Exception Handling
REJ09B0310-0100
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