p2125vps20 Renesas Electronics Corporation., p2125vps20 Datasheet - Page 408

• Manufacturer Part Number: p2125vps20
• Description: 16-bit Single-chip Microcomputer H8s Family / H8s/2100 Series
• Manufacturer: Renesas Electronics Corporation.

Section 16 I
16.3.3
SARX sets the second slave address and selects the communication format. In slave mode,
transmit/receive operations by the DTC are possible when the received address matches the
second slave address. If the LSI is in slave mode with the I
bit is set to 0 and the upper 7 bits of SARX match the upper 7 bits of the first frame received after
a start condition, the LSI operates as the slave device specified by the master device. SARX can be
accessed only when the ICE bit in ICCR is cleared to 0.
Rev. 1.00 Sep. 21, 2006 Page 370 of 658
REJ09B0310-0100
Bit
7
6
5
4
3
2
1
0
Bit
7
6
5
4
3
2
1
0
Bit Name
SVA6
SVA5
SVA4
SVA3
SVA2
SVA1
SVA0
FS
Bit Name
SVAX6
SVAX5
SVAX4
SVAX3
SVAX2
SVAX1
SVAX0
FSX
Second Slave Address Register (SARX)
2
C Bus Interface (IIC)
Initial
Value
0
0
0
0
0
0
0
0
Initial
Value
0
0
0
0
0
0
0
1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
Slave Address 6 to 0
Set a slave address.
Format Select
Selects the communication format with the combination of
the FSX bit in SARX. Refer to table 16.2.
This bit should be set to 0 when general call address
recognition is performed.
Description
Second Slave Address 6 to 0
Set the second slave address.
Format Select X
Selects the communication format together with the FS bit in
SAR and the SW bit in DDCSWR. Refer to table 16.2.
2
C bus format selected, when the FSX