p2125vps20 Renesas Electronics Corporation., p2125vps20 Datasheet - Page 391

• Manufacturer Part Number: p2125vps20
• Description: 16-bit Single-chip Microcomputer H8s Family / H8s/2100 Series
• Manufacturer: Renesas Electronics Corporation.

15.6.4
Figure 15.18 shows an example of SCI operation for reception in clocked synchronous mode. In
serial reception, the SCI operates as described below.
1. The SCI performs internal initialization in synchronization with a synchronization clock input
2. If an overrun error (when reception of the next data is completed while the RDRF flag is still
3. If reception finishes successfully, the RDRF bit in SSR is set to 1, and receive data is
Synchronization
clock
Serial data
RDRF
ORER
or output, starts receiving data, and stores the receive data in RSR.
set to 1) occurs, the ORER bit in SSR is set to 1. If the RIE bit in SCR is set to 1 at this time,
an ERI interrupt request is generated. Receive data is not transferred to RDR. The RDRF flag
remains to be set to 1.
transferred to RDR. If the RIE bit in SCR is set to 1 at this time, an RXI interrupt request is
generated. Because the RXI interrupt routine reads the receive data transferred to RDR before
reception of the next receive data has finished, continuous reception can be enabled.
Figure 15.18 Example of SCI Receive Operation in Clocked Synchronous Mode
Serial Data Reception (Clocked Synchronous Mode)
RXI interrupt
request
generated
Bit 7
RDR data read and
RDRF flag cleared to 0
in RXI interrupt
handling routine
Bit 0
1 frame
Bit 7
Section 15 Serial Communication Interface (SCI)
Bit 0
RXI interrupt request
generated
Rev. 1.00 Sep. 21, 2006 Page 353 of 658
Bit 1
ERI interrupt request
generated by overrun
error
Bit 6
REJ09B0310-0100
Bit 7