p2125vps20 Renesas Electronics Corporation., p2125vps20 Datasheet - Page 537
p2125vps20
Manufacturer Part Number
p2125vps20
Description
16-bit Single-chip Microcomputer H8s Family / H8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.P2125VPS20.pdf
(700 pages)
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A single divided block is erased by one erasing processing. For block divisions, refer to figure
19.4. To erase two or more blocks, update the erase-block number and perform the erasing
processing for each block.
(a)
Set the EPVB bit in FECS to 1.
Several programming/erasing programs cannot be selected at one time. If several programs are set,
download is not performed and a download error is reported to the SS bit in the DPFR parameter.
Specify the start address of the download destination by FTDAR.
The procedures to be carried out after setting FKEY, e.g. download and initialization, are the same
as those in the programming procedure. For details, see section 19.4.2 (2), Programming
Procedure in User Program Mode.
The procedures after setting parameters for erasing programs are as follows:
(b) Set the FEBS parameter necessary for erasure
Set the erase-block number of the user MAT in the flash erase block select parameter FEBS
(general register ER0). If a value other than an erase-block number of the user MAT is set, no
block is erased even though the erasing program is executed, and an error is returned to the return
value parameter FPFR.
(c)
Similar to as in programming, there is an entry point for the erasing program in the area from the
start address of a download destination specified by FTDAR + 16 bytes. The subroutine is called
and erasing is executed by using the following steps.
• The general registers other than R0L are saved in the erasing program.
• R0L is a return value of the FPFR parameter.
• Since the stack area is used in the erasing program, a 128-byte stack area at the maximum must
MOV.L
JSR
NOP
be allocated in RAM.
Select the on-chip program to be downloaded
Erasure
#DLTOP+16,ER2
@ER2
; Set entry address to ER2
; Call erasing routine
Section 19 Flash Memory (0.18-µm F-ZTAT Version)
Rev. 1.00 Sep. 21, 2006 Page 499 of 658
REJ09B0310-0100
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