p2125vps20 Renesas Electronics Corporation., p2125vps20 Datasheet - Page 437

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p2125vps20

Manufacturer Part Number
p2125vps20
Description
16-bit Single-chip Microcomputer H8s Family / H8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
12. Clear the IRIC flag to 0.
Figure 16.8 Example of Operation Timing in Master Transmit Mode (MLS = WAIT = 0)
User processing
(master output)
(slave output)
(master output)
Write 0 to ACKE in ICCR, to clear received ACKB contents to 0.
Write 0 to BBSY and SCP in ICCR. This changes SDA from low to high when SCL is high,
and generates the stop condition.
Note:* Data write
ICDRE
ICDRT
ICDRS
SDA
IRTR
IRIC
SDA
SCL
in ICDR
prohibited
Start condition generation
[4] BBSY set to 1
SCP cleared to 0
(start condition issuance)
[5]
Interrupt
request
Address + R/W
Address + R/W
Bit 7
[6] ICDR write
1
Bit 6
2
Bit 5
3
Slave address
Bit 4
[6] IRIC clear
4
Bit 3
5
Bit 2
6
Rev. 1.00 Sep. 21, 2006 Page 399 of 658
Bit 1
7
[9] ICDR write
R/W
Section 16 I
Bit 0
8
[7]
A
9
Interrupt
request
2
C Bus Interface (IIC)
REJ09B0310-0100
[9] IRIC clear
Data 1
Bit 7
Data 1
1
Data 1
Bit 6
2

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