p2125vps20 Renesas Electronics Corporation., p2125vps20 Datasheet - Page 271

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p2125vps20

Manufacturer Part Number
p2125vps20
Description
16-bit Single-chip Microcomputer H8s Family / H8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
11.5.7
The output compare flag, OCFA or OCFB, is set to 1 by a compare-match signal generated when
the FRC value matches the OCRA or OCRB value. This compare-match signal is generated at the
last state in which the two values match, just before FRC increments to a new value. When the
FRC and OCRA or OCRB value match, the compare-match signal is not generated until the next
cycle of the clock source. Figure 11.12 shows the timing of setting the OCFA or OCFB flag.
11.5.8
The FRC overflow flag (OVF) is set to 1 when FRC overflows (changes from H'FFFF to H'0000).
Figure 11.13 shows the timing of setting the OVF flag.
φ
FRC
OCRA, OCRB
Compare-match
signal
OCFA, OCFB
Timing of Output Compare Flag (OCF) setting
Timing of FRC Overflow Flag Setting
Figure 11.12 Timing of Output Compare Flag (OCFA or OCFB) Setting
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Section 11 16-Bit Free-Running Timer (FRT)
Rev. 1.00 Sep. 21, 2006 Page 233 of 658
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REJ09B0310-0100

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