p2125vps20 Renesas Electronics Corporation., p2125vps20 Datasheet - Page 387

no-image

p2125vps20

Manufacturer Part Number
p2125vps20
Description
16-bit Single-chip Microcomputer H8s Family / H8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
15.6.2
Before transmitting and receiving data, you should first clear the TE and RE bits in SCR to 0, then
initialize the SCI as described in a sample flowchart in figure 15.15. When the operating mode,
transfer format, etc., is changed, the TE and RE bits must be cleared to 0 before making the
change using the following procedure. When the TE bit is cleared to 0, the TDRE flag in SSR is
set to 1. However, clearing the RE bit to 0 does not initialize the RDRF, PER, FER, and ORER
flags in SSR, or RDR.
Note: * In simultaneous transmit and receive operations, the TE and RE bits should both be cleared
Set TE and RE bits in SCR to 1, and
SCI Initialization (Clocked Synchronous Mode)
Set data transfer/receive format in
set RIE, TIE, TEIE, and MPIE bits
Clear TE and RE bits in SCR to 0
Set CKE1 and CKE0 bits in SCR
to 0 or set to 1 simultaneously.
(TE and RE bits are 0)
1-bit interval elapsed?
Start initialization
Set value in BRR
SMR and SCMR
<Transfer start>
Figure 15.15 Sample SCI Initialization Flowchart
Yes
Wait
No
[4]
[2]
[3]
[1]
[1]
[2]
[3]
[4]
Section 15 Serial Communication Interface (SCI)
Set the clock selection in SCR. Be sure to
clear bits RIE, TIE, TEIE, and MPIE, TE and
RE to 0.
Set the data transfer/receive format in SMR
and SCMR.
Write a value corresponding to the bit rate to
BRR. This step is not necessary if an
external clock is used.
Wait at least one bit interval, then set the TE
bit or RE bit in SCR to 1.
Also set the RIE, TIE TEIE, and MPIE bits.
Setting the TE and RE bits enables the TxD
and RxD pins to be used.
Rev. 1.00 Sep. 21, 2006 Page 349 of 658
REJ09B0310-0100

Related parts for p2125vps20