p2125vps20 Renesas Electronics Corporation., p2125vps20 Datasheet - Page 544
p2125vps20
Manufacturer Part Number
p2125vps20
Description
16-bit Single-chip Microcomputer H8s Family / H8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.P2125VPS20.pdf
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Section 19 Flash Memory (0.18-µm F-ZTAT Version)
6. After programming/erasing, access to the flash memory is prohibited until FKEY is cleared.
7. Switching of the MATs by FMATS should be required when programming/erasing of the user
8. When the program data storable area indicated by the programming parameter FMPDR is in
In consideration of these conditions, the following tables show areas where program data can be
stored and executed for different combinations of operating mode, user MAT bank configuration,
and processing type.
Table 19.7 Executable MAT
Note:
Rev. 1.00 Sep. 21, 2006 Page 506 of 658
REJ09B0310-0100
Processing
Programming
Erasing
In case the LSI mode is changed to generate a reset on completion of a programming/erasing
operation, a reset state (RES = 0) of 100 µs or more must be secured.
Transitions to the reset state or hardware standby mode are prohibited during
programming/erasing operations. However, when the reset signal is accidentally input to the
chip, the reset must be released after a reset period of 100 µs that is longer than normal.
MAT is operated in user boot mode. The program that switches the MATs should be executed
from the on-chip RAM. (For details, see section 19.6, Switching between User MAT and User
Boot MAT.) Make sure you know which MAT is currently selected when switching them.
flash memory, an error will occur even when the program data stored is normal. Therefore, the
program data should be temporarily transferred to the on-chip RAM to set an address other
than flash memory in FMPDR.
*
Programming/Erasing is possible to the user MAT.
User Program Mode
Table 19.8 (1)
Table 19.8 (2)
Initiated Mode
User Boot Mode*
Table 19.8 (3)
Table 19.8 (4)
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