p2125vps20 Renesas Electronics Corporation., p2125vps20 Datasheet - Page 410

• Manufacturer Part Number: p2125vps20
• Description: 16-bit Single-chip Microcomputer H8s Family / H8s/2100 Series
• Manufacturer: Renesas Electronics Corporation.

Section 16 I
16.3.4
ICMR sets the communication format and transfer rate. It can only be accessed when the ICE bit
in ICCR is set to 1.
Rev. 1.00 Sep. 21, 2006 Page 372 of 658
REJ09B0310-0100
Bit
7
6
5
4
3
Bit Name
MLS
WAIT
CKS2
CKS1
CKS0
I
2
2
C Bus Mode Register (ICMR)
C Bus Interface (IIC)
Initial
Value
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
Description
MSB-First/LSB-First Select
0: MSB-first
1: LSB-first
Set this bit to 0 when the I
Wait Insertion Bit
This bit is valid only in master mode with the I
0: Data and the acknowledge bit are transferred
1: After the fall of the clock for the final data bit (8
For details, refer to section 16.4.7, IRIC Setting Timing and
SCL Control.
Transfer Clock Select 2 to 0
These bits are used only in master mode.
These bits select the required transfer rate, together with the
IICX1 (IIC_1) and IICX0 (IIC_0) bits in STCR. Refer to table
16.3.
consecutively with no wait inserted.
IRIC flag is set to 1 in ICCR, and a wait state begins (with
SCL at the low level). When the IRIC flag is cleared to 0 in
ICCR, the wait ends and the acknowledge bit is
transferred.
2
C bus format is used.
2
C bus format.
th
clock), the