p2125vps20 Renesas Electronics Corporation., p2125vps20 Datasheet - Page 99

• Manufacturer Part Number: p2125vps20
• Description: 16-bit Single-chip Microcomputer H8s Family / H8s/2100 Series
• Manufacturer: Renesas Electronics Corporation.

Bit
4
3
2
1
0
Bit Name
IICE
FLSHE
—
ICKS1
ICKS0
Initial
Value
0
0
0
0
0
R/W
R/W
R/W
R/(W) Reserved
R/W
R/W
Description
I
Enables or disables CPU access to IIC registers (ICCR,
ICSR, ICDR/SARX, ICMR/SAR, and DDCSWR), PWMX
registers (DADRAH/DACR, DADRAL, DADRBH/DACNTH,
and DADRBL/DACNTL), and SCI registers (SMR, BRR, and
SCMR).
0: SCI_1 registers are accessed in areas from H'(FF)FF88 to
1: IIC_1 registers are accessed in areas from H'(FF)FF88 to
Flash Memory Control Register Enable
Enables or disables CPU access for flash memory registers
(FCCS, FPCS, FECS, FKEY, FMATS, and FTDAR), power-
down state control registers (SBYCR, LPWRCR, MSTPCRH,
and MSTPCRL), and on-chip peripheral module control
registers (BCR2, WSCR, PCSR, and SYSCR2).
0: Control registers of power-down state and peripheral
1: Control registers of flash memory are accessed in an area
The initial value should not be changed.
Internal Clock Source Select 1, 0
These bits select a clock to be input to the timer counter
(TCNT) and a count condition together with bits CKS2 to
CKS0 in the timer control register (TCR). For details, see
section 13.3.4, Timer Control Register (TCR).
2
C Master Enable
H'(FF)FF89 and from H'(FF)FF8E to H'(FF)FF8F.
SCI_2 registers are accessed in areas from H'(FF)FFA0 to
H'(FF)FFA1 and from H'(FF)FFA6 to H'(FF)FFA7.
Access is prohibited in areas from H'(FF)FFD8 to
H'(FF)FFD9 and from H'(FF)FFDE to H'(FF)FFDF.
H'(FF)FF89 and from H'(FF)FF8E to H'(FF)FF8F.
PWMX registers are accessed in areas from H'(FF)FFA0
to H'(FF)FFA1 and from H'(FF)FFA6 to H'(FF)FFA7.
IIC_0 registers are accessed in areas from H'(FF)FFD8 to
H'(FF)FFD9 and from H'(FF)FFDE to H'(FF)FFDF.
DDCSWR is accessed in areas of H'(FF)FEE6.
modules are accessed in an area from H'(FF)FF80 to
H'(FF)FF87. Area from H'(FF)FEA8 to H'(FF)FEAE is
reserved.
from H'(FF)FEA8 to H'(FF)FEAE. Area from H'(FF)FF80 to
H'(FF)FF87 is reserved.
Rev. 1.00 Sep. 21, 2006 Page 61 of 658
Section 3 MCU Operating Modes
REJ09B0310-0100