p2125vps20 Renesas Electronics Corporation., p2125vps20 Datasheet - Page 304

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p2125vps20

Manufacturer Part Number
p2125vps20
Description
16-bit Single-chip Microcomputer H8s Family / H8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
Section 12 16-Bit Cycle Measurement Timer (TCM)
12.6.5
If the CST bit in TCMCR is set to 1 in speed measurement mode, and the TCMMDS bit in
TCMCR is cleared, but the selected edge from TCMCYI is detected at the same time, detection of
the selected edge will cause the timer to continue to operate in speed measurement mode. The
timer will not make the transition to timer mode until the next detection of the selected edge. Thus,
ensure that the CST bit is cleared to 0 in speed measurement mode.
Figure 12.16 shows the timing of this conflict.
12.6.6
The module-stop control register can be used to select either continuation or stoppage of TCM
operation in module-stopped mode. The default setting is for TCM operation to stop. TCM
registers become accessible on release from module-stopped mode. For details, see section 22,
Power-Down Modes.
Rev. 1.00 Sep. 21, 2006 Page 266 of 658
REJ09B0310-0100
WRTCMCR
φ
TCMCYI
Input capture
signal
TCMMDS
TCMCNT
TCMICR
Figure 12.16 Conflict between Edge Detection and Clearing of TCMMDS
Conflict between Edge Detection in Speed Measurement Mode and Clearing of
TCMMDS Bit in TCMCR
Setting for Module Stop Mode
(to Switch from Speed Measurement Mode to Timer Mode)
A
Capture generated in speed measurement mode
TCMCNT cleared at the first rising edge
A
H'0000
B
B
B + 1
Capture of
input capture
generated
TCMCNT
not cleared

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