p2125vps20 Renesas Electronics Corporation., p2125vps20 Datasheet - Page 239

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p2125vps20

Manufacturer Part Number
p2125vps20
Description
16-bit Single-chip Microcomputer H8s Family / H8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
• DADRB
Bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Bit Name
DA13
DA12
DA11
DA10
DA9
DA8
DA7
DA6
DA5
DA4
DA3
DA2
DA1
DA0
CFS
REGS
1
1
Initial
Value
1
1
1
1
1
1
1
1
1
1
1
1
1
1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
D/A Data 13 to 0
These bits set a digital value to be converted to an analog
value.
In each base cycle, the DACNT value is continually
compared with the DADR value to determine the duty cycle
of the output waveform, and to decide whether to output a
fine-adjustment pulse equal in width to the resolution. To
enable this operation, this register must be set within a
range that depends on the CFS bit. If the DADR value is
outside this range, the PWM output is held constant.
A channel can be operated with 12-bit precision by fixing
DA0 and DA1 to 0. The two data bits are not compared with
DACNT12 and DACNT13 of DACNT.
Carrier Frequency Select
0: Base cycle = resolution (T) × 64
1: Base cycle = resolution (T) × 256
Register Select
DADRA and DACR, and DADRB and DACNT, are located
at the same addresses. The REGS bit specifies which
registers can be accessed.
0: DADRA and DADRB can be accessed
1: DACR and DACNT can be accessed
DA13 to DA0 range = H'0100 to H'3FFF
DA13 to DA0 range = H'0040 to H'3FFF
Rev. 1.00 Sep. 21, 2006 Page 201 of 658
Section 10 14-Bit PWM Timer (PWMX)
REJ09B0310-0100

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