p2125vps20 Renesas Electronics Corporation., p2125vps20 Datasheet - Page 591

• Manufacturer Part Number: p2125vps20
• Description: 16-bit Single-chip Microcomputer H8s Family / H8s/2100 Series
• Manufacturer: Renesas Electronics Corporation.

This LSI incorporates a clock pulse generator which generates the system clock (φ), internal clock,
bus master clock, and subclock (φSUB). The clock pulse generator consists of an oscillator, duty
correction circuit, system clock select circuit, medium-speed clock divider, bus master clock select
circuit, subclock input circuit, and subclock waveform forming circuit. Figure 21.1 shows a block
diagram of the clock pulse generator.
EXCL
In high-speed mode or medium-speed mode, the bus master clock is selected by software
according to the settings of the SCK2 to SCK0 bits in the standby control register (SBYCR). For
details on SBYCR, see section 22.1.1, Standby Control Register (SBYCR).
The subclock input is controlled by software according to the setting of the EXCLE bit in the low
power control register (LPWRCR). For details on LPWRCR, see section 22.1.2, Low-Power
Control Register (LPWRCR).
CPG0500A_000020020300
EXTAL
XTAL
Subclock
input circuit
Oscillator
Figure 21.1 Block Diagram of Clock Pulse Generator
Section 21 Clock Pulse Generator
Subclock
waveform
forming circuit
Duty
correction
circuit
WDT_1
count clock
φSUB
φ
System
clock
select
circuit
System clock
to φ pin
φ
Rev. 1.00 Sep. 21, 2006 Page 553 of 658
Medium-
speed clock
divider
Section 21 Clock Pulse Generator
Internal clock
to on-chip
peripheral modules
φ/2
to φ/32
Bus master
clock select
circuit
REJ09B0310-0100
Bus master clock
to CPU and DTC