p2125vps20 Renesas Electronics Corporation., p2125vps20 Datasheet - Page 342

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p2125vps20

Manufacturer Part Number
p2125vps20
Description
16-bit Single-chip Microcomputer H8s Family / H8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
Section 14 Watchdog Timer (WDT)
14.3.2
TCSR selects the clock source to be input to TCNT, and the timer mode.
• TCSR_0
Rev. 1.00 Sep. 21, 2006 Page 304 of 658
REJ09B0310-0100
Bit
7
6
5
4
3
Bit Name
OVF
WT/IT
TME
RST/NMI 0
Timer Control/Status Register (TCSR)
Initial
Value
0
0
0
0
R/W
R/(W)* Overflow Flag
R/W
R/W
R/W
R/W
Timer Enable
Reserved
Description
Indicates that TCNT has overflowed (changes from H'FF to
H'00).
[Setting condition]
When TCNT overflows (changes from H'FF to H'00)
When internal reset request generation is selected in
watchdog timer mode, OVF is cleared automatically by the
internal reset.
[Clearing conditions]
Timer Mode Select
Selects whether the WDT is used as a watchdog timer or
interval timer.
0: Interval timer mode
1: Watchdog timer mode
When this bit is set to 1, TCNT starts counting.
When this bit is cleared, TCNT stops counting and is
initialized to H'00.
The initial value should not be changed.
Reset or NMI
Selects to request an internal reset or an NMI interrupt when
TCNT has overflowed.
0: An NMI interrupt is requested
1: An internal reset is requested
When TCSR is read when OVF = 1, then 0 is written to
OVF
When 0 is written to TME

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