p2125vps20 Renesas Electronics Corporation., p2125vps20 Datasheet - Page 503

• Manufacturer Part Number: p2125vps20
• Description: 16-bit Single-chip Microcomputer H8s Family / H8s/2100 Series
• Manufacturer: Renesas Electronics Corporation.

1. Selection of on-chip program to be downloaded
2. Download of on-chip program
3. Initialization of programming/erasing
4. Execution of programming/erasing
For programming/erasing execution, set the FLSHE bit in STCR to 1 to make a transition to
user program mode.
This LSI has programming/erasing programs that can be downloaded to the on-chip RAM. The
on-chip program to be downloaded is selected by setting the corresponding bits in the
programming/erasing interface register. The address of the download destination is specified
by the flash transfer destination address register (FTDAR).
The on-chip program is automatically downloaded by setting the flash key code register
(FKEY) and the SCO bit in the flash code control status register (FCCS), which are
programming/erasing interface registers.
The flash memory MAT is replaced with the embedded program storage MAT during
downloading. Since the flash memory cannot be read during programming/erasing, the
procedure program that executes download to completion of programming/erasing must be
executed in a space other than flash memory (for example, on-chip RAM).
Since the result of download is returned to the programming/erasing interface parameter,
whether download has succeeded or not can be confirmed.
Set the operating frequency before execution of programming/erasing. This setting is
performed by using the programming/erasing interface parameter.
For programming/erasing execution, set the FLSHE bit in STCR to 1 to make a transition to
user program mode.
The program data/programming destination address is specified in 128-byte units for
programming. The block to be erased is specified in erase-block units for erasing.
Make these specifications by using the programming/erasing interface parameter, and then
initiate the on-chip program. The on-chip program is executed by using the JSR or BSR
instruction to execute the subroutine call of the specified address in the on-chip RAM. The
execution result is returned to the programming/erasing interface parameter.
The area to be programmed must be erased in advance when programming flash memory. All
interrupts must be disabled during programming and erasing. Interrupts must be masked within
the user system.
Section 19 Flash Memory (0.18-µm F-ZTAT Version)
Rev. 1.00 Sep. 21, 2006 Page 465 of 658
REJ09B0310-0100