p2125vps20 Renesas Electronics Corporation., p2125vps20 Datasheet - Page 358

• Manufacturer Part Number: p2125vps20
• Description: 16-bit Single-chip Microcomputer H8s Family / H8s/2100 Series
• Manufacturer: Renesas Electronics Corporation.

Section 15 Serial Communication Interface (SCI)
15.3.6
SCR is a register that performs enabling or disabling of SCI transfer operations and interrupt
requests, and selection of the transfer clock source. SCR can always be read from by the CPU.
Writing to SCR by the CPU is enabled only in the initial setting, and not enabled during the
receive, transmit, or transfer operation.
For details on interrupt requests, refer to section 15.7, Interrupt Sources.
Rev. 1.00 Sep. 21, 2006 Page 320 of 658
REJ09B0310-0100
Bit
2
1
0
Bit
7
6
Bit Name
MP
CKS1
CKS0
Bit Name
RIE
TIE
Serial Control Register (SCR)
Initial
Value
0
0
0
Initial
Value
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
Multiprocessor Mode (enabled only in asynchronous
mode)
When this bit is set to 1, the multiprocessor
communication function is enabled. The PE bit and O/E
bit settings are invalid in multiprocessor mode.
Clock Select 1,0
These bits select the clock source for the on-chip baud
rate generator.
00: φ clock (n = 0)
01: φ/4 clock (n = 1)
10: φ/16 clock (n = 2)
11: φ/64 clock (n = 3)
For the relation between the bit rate register setting and
the baud rate, see section 15.3.9, Bit Rate Register
(BRR). n is the decimal display of the value of n in BRR.
Description
Transmit Interrupt Enable
When this bit is set to 1, a TXI interrupt request is
enabled.
Receive Interrupt Enable
When this bit is set to 1, RXI and ERI interrupt requests
are enabled.