p2125vps20 Renesas Electronics Corporation., p2125vps20 Datasheet - Page 448

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p2125vps20

Manufacturer Part Number
p2125vps20
Description
16-bit Single-chip Microcomputer H8s Family / H8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
Section 16 I
Rev. 1.00 Sep. 21, 2006 Page 410 of 658
REJ09B0310-0100
Figure 16.17 Sample Flowchart for Operations in Slave Receive Mode (HNDS = 1)
2
C Bus Interface (IIC)
Read AASX, AAS and ADZ in ICSR
No
No
No
Read ICDR, clear IRIC flag
Clear IRIC flag in ICCR
Read IRIC flag in ICCR
Clear IRIC flag in ICCR
Clear IRIC flag in ICCR
Clear IRIC flag in ICCR
Clear IRIC flag in ICCR
Read IRIC flag in ICCR
Clear IRIC flag in ICCR
Set ACKB = 0 in ICSR
and HNDS = 1 in ICXR
Set ACKB = 1 in ICSR
and TRS = 0 in ICCR
Slave receive mode
Read TRS in ICCR
Last reception?
and ADZ = 1?
Set MST = 0
ICDRF = 1?
Initialize IIC
ESTP = 1 or
Read ICDR
Read ICDR
IRIC = 1?
STOP = 1?
IRIC = 1?
TRS = 1?
IRIC = 1?
AAS = 1
End
Yes
Yes
Yes
Yes
No
No
No
No
No
Yes
Yes
Yes
Yes
[2] Read the receive data remaining unread.
[1] Initialization. Select slave receive mode.
[3] to [7] Wait for one byte to be received (slave address + R/W)
[10] Read the receive data. The first read is a dummy read.
[5] to [7] Wait for the reception to end.
[8] Clear IRIC flag
[8] Clear IRIC flag.
[9] Set acknowledge data for the last reception.
[10] Read the receive data.
[5] to [7] Wait for reception end.
[11] Detect stop condition.
[12] Check STOP bit.
[8] Clear IRIC flag.
[12] Clear IRIC flag.
Slave transmit mode
General call address processing
* Description omitted

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