HD6417144 RENESAS [Renesas Technology Corp], HD6417144 Datasheet - Page 142

• Manufacturer Part Number: HD6417144
• Description: 32-Bit RISC Microcomputer SuperHTM RISC engine Family/SH7144 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

6. Interrupt Controller (INTC)
6.8
The following data transfers can be done using interrupt request signals:
• Activate DMAC only, CPU interrupts do not occur
• Activate DTC only, CPU interrupts according to DTC settings
Interrupt sources that are activated by DMAC are masked without being input to INTC. Mask
condition is as follows:
Mask condition = DME • (DE0 • interrupt source select 0 + DE1 • interrupt source select 1 + DE2
The INTC masks CPU interrupts when the corresponding DTE bit is 1. The conditions for clearing
DTE and interrupt source flag are listed below.
Figure 6.6 shows a control block diagram.
Rev.4.00 Mar. 27, 2008 Page 98 of 882
REJ09B0108-0400
Flag clear (by DMAC)
Interrupt source
flag clear (by DTC)
DTE clear condition = DTC transfer end • DTECLR
Interrupt source flag clear condition = DTC transfer end • DTECLR+DMAC transfer end
Where: DTECLR = DISEL + counter 0.
Data Transfer with Interrupt Request Signals
Interrupt source
Interrupt source
Figure 6.6 Interrupt Control Block Diagram
• interrupt source select 2 + DE3 • interrupt source select 3)
DMAC
DTE clear
Interrupt source
(not designated as DMAC activation source)
DTER
CPU interrupt request
DTC activation
request
DTECLR
Transfer end