HD6417144 RENESAS [Renesas Technology Corp], HD6417144 Datasheet - Page 167

• Manufacturer Part Number: HD6417144
• Description: 32-Bit RISC Microcomputer SuperHTM RISC engine Family/SH7144 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Figure 8.4 shows the correspondence between DTC vector addresses and register information
allocation. For each DTC activating source there are 2 bytes in the DTC vector table, which
contain the register information start address.
Table 8.1 shows the correspondence between activating sources and vector addresses. When
activating with software, the vector address is calculated as H'0400 + DTVEC[7:0].
Through DTC activation, a register information start address is read from the vector table, then
register information placed in memory space is read from that register information start address.
Always designate register information start addresses in multiples of four.
Figure 8.4 Correspondence between DTC Vector Address and Transfer Information
Register
information
start address
Figure 8.3 DTC Register Information Allocation in Memory Space
DTC vector address
Memory space
Normal mode
DTCRA
DTSAR
DTDAR
DTMR
Transfer information
Register information
DTC vector table
(lower 16 bits)
(upper 16 bits)
start address
start address
DTBR
Memory space
Repeat mode
DTCRA
DTSAR
DTDAR
DTIAR
DTMR
Rev.4.00 Mar. 27, 2008 Page 123 of 882
Block transfer mode
Memory space
8. Data Transfer Controller (DTC)
DTCRA
DTCRB
DTDAR
DTSAR
DTMR
Memory space
information
Register
Register
information
REJ09B0108-0400