HD6417144 RENESAS [Renesas Technology Corp], HD6417144 Datasheet - Page 475

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HD6417144

Manufacturer Part Number
HD6417144
Description
32-Bit RISC Microcomputer SuperHTM RISC engine Family/SH7144 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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13.4.5
Figure 13.6 shows an example of the operation for transmission in asynchronous mode. In
transmission, the SCI operates as described below.
1. The SCI monitors the TDRE flag in SSR, and if is cleared to 0, recognizes that data has been
2. After transferring data from TDR to TSR, the SCI sets the TDRE flag to 1 and starts
3. Data is sent from the TxD pin in the following order: start bit, transmit data, parity bit or
4. The SCI checks the TDRE flag at the timing for sending the stop bit.
5. If the TDRE flag is 0, the data is transferred from TDR to TSR, the stop bit is sent, and then
6. If the TDRE flag is 1, the TEND flag in SSR is set to 1, the stop bit is sent, and then the “mark
written to TDR, and transfers the data from TDR to TSR.
transmission. If the TIE bit is set to 1 at this time, a transmit data empty interrupt request (TXI)
is generated. Because the TXI interrupt routine writes the next transmit data to TDR before
transmission of the current transmit data has finished, continuous transmission can be enabled.
multiprocessor bit (may be omitted depending on the format), and stop bit.
serial transmission of the next frame is started.
state” is entered in which 1 is output. If the TEIE bit in SCR is set to 1 at this time, a TEI
interrupt request is generated.
TxD
TDRE
TEND
Figure 13.6 Example of Operation in Transmission in Asynchronous Mode
Data Transmission (Asynchronous Mode)
TXI interrupt
request
generated
1
Start
bit
0
Data written to TDR
and TDRE flag cleared
to 0 in TXI interrupt
processing routine
D0
(Example with 8-Bit Data, Parity, One Stop Bit)
D1
1 frame
Data
D7
Parity
bit
0/1
TXI interrupt
request
generated
Stop
bit
1
Start
bit
0
D0
13. Serial Communication Interface (SCI)
Rev.4.00 Mar. 27, 2008 Page 431 of 882
D1
Data
D7
Parity
bit
0/1
TEI interrupt
request
generated
Stop
bit
1
REJ09B0108-0400
Idle state
(mark state)
1

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