HD6417144 RENESAS [Renesas Technology Corp], HD6417144 Datasheet - Page 164

• Manufacturer Part Number: HD6417144
• Description: 32-Bit RISC Microcomputer SuperHTM RISC engine Family/SH7144 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

8. Data Transfer Controller (DTC)
8.2.8
DTCSR is a 16-bit readable/writable register that is used to disable/enable DTC activation by
software and to set the DTC vector addresses for software activation. It also indicates the DTC
transfer status.
Rev.4.00 Mar. 27, 2008 Page 120 of 882
REJ09B0108-0400
Bit
15 to
11
10
9
8
Bit Name
—
NMIF
AE
SWDTE
DTC Control/Status Register (DTCSR)
All 0
0
0
Initial Value
0
R/W
R
R/(W)*
R/(W)*
R/W*
2
1
1
Description
Reserved
These bits have no effect on DTC operation. The
write value should always be 0.
NMI Flag Bit
This bit indicates that an NMI interrupt has occurred.
0: No NMI interrupts
[Clearing condition]
•
1: NMI interrupt has been generated
When the NMIF bit is set, DTC transfers are not
allowed even if the DTER bit is set to 1. If, however,
a transfer has already started with the NMIM bit of
the DTMR set to 1, execution will continue until that
transfer ends.
Address Error Flag
This bit indicates that an address error by the DTC
has occurred.
0: No address error by the DTC
[Clearing condition]
•
1: An address error by the DTC occurred
When the AE bit is set, DTC transfers are not
allowed even if the DTER bit is set to 1.
DTC Software Activation Enable
Setting this bit to 1 activates DTC.
0: DTC activation by software disabled
1: DTC activation by software enabled
Write 0 after reading the NMIF bit
Write 0 after reading the AE bit