HD6417144 RENESAS [Renesas Technology Corp], HD6417144 Datasheet - Page 310

• Manufacturer Part Number: HD6417144
• Description: 32-Bit RISC Microcomputer SuperHTM RISC engine Family/SH7144 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

11.
For details of PWM modes, see section 11.4.5, PWM Modes.
11.4.3
Buffer operation, provided for channels 0, 3, and 4, enables TGRC and TGRD to be used as buffer
registers.
Buffer operation differs depending on whether TGR has been designated as an input capture
register or as a compare match register.
Table 11.29 shows the register combinations used in buffer operation.
Table 11.29 Register Combinations in Buffer Operation
Rev.4.00 Mar. 27, 2008 Page 266 of 882
REJ09B0108-0400
Channel
0
3
4
Multi-Function Timer Pulse Unit (MTU)
Buffer Operation
TGRB_0
TGRB_1
TGRA_0
TGRB_2
TGRA_1
TGRA_2
H'0000
TIOC0A
TIOC1A
TIOC2A
TCNT0 to TCNT2
values
Figure 11.12
Timer General Register
TGRA_0
TGRB_0
TGRA_3
TGRB_3
TGRA_4
TGRB_4
Example of Synchronous Operation
Synchronous clearing by TGRB_0 compare match
Buffer Register
TGRC_0
TGRD_0
TGRC_3
TGRD_3
TGRC_4
TGRD_4
Time