HD6417144 RENESAS [Renesas Technology Corp], HD6417144 Datasheet - Page 225

• Manufacturer Part Number: HD6417144
• Description: 32-Bit RISC Microcomputer SuperHTM RISC engine Family/SH7144 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Figure 10.2 is a flowchart of this procedure.
(SAR, DAR, DMATCR, CHCR, DMAOR)
DEI interrupt request (when IE = 1)
DMATCR – 1 → DMATCR,
Notes:
Transfer (1 transfer unit);
SAR and DAR updated
NMIF, AE, TE = 0?
NMIF = 1, AE = 1,
DE, DME = 1 and
Transfer request
DE = 0, or DME
DMATCR = 0?
Initial settings
Transfer ends
Yes
Yes
occurs?*
Yes
Yes
1.
2.
3.
Start
Does
= 0?
Figure 10.2 DMAC Transfer Flowchart
In auto-request mode, transfer begins when NMIF, AE, and TE are all 0,
and the DE and DME bits are set to 1.
DREQ = level detection in burst mode (external request) or cycle-steal
mode.
DREQ = edge detection in burst mode (external request), or auto-request
mode in burst mode.
1
No
No
No
No
NMIF = 1, AE = 1,
Transfer aborted
DE = 0, or DME
10. Direct Memory Access Controller (DMAC)
Normal end
Yes
*
Does
= 0?
3
Rev.4.00 Mar. 27, 2008 Page 181 of 882
DREQ detection selection
transfer request mode,
Bus mode,
system
No
*
2
REJ09B0108-0400